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New posts in x86

best way to shuffle across AVX lanes?

c++ x86 sse simd avx

Why can the MESI protocol not guarantee atomicity of CMPXCHG on x86 without the LOCK prefix?

x86 atomic cpu-architecture compare-and-swap mesi

Understanding Inline assembly in a pre-processor macro vs Inline assembly in a function

c gcc x86 inline-assembly osdev

Getting the caller's Return Address

c++ assembly visual-c++ x86 backtrace

Why is LOCK a full barrier on x86?

x86 cpu-architecture memory-barriers

Why is sizeof std::mutex == 40 when cache line size is often 64 bytes

c++ optimization x86 false-sharing stdmutex

How to perform low-level IO with a USB flash drive under the BIOS (compared to a floppy)?

assembly x86 bios usb-drive bootstrapping

Real Mode, Interrupt vector replacement Crashing

assembly x86 bootloader interrupt-handling

How to translate "pushl 2000" from AT&T asm to Intel syntax on i386

assembly x86 intel att i386

Stack / base pointers in assembly

assembly x86 callstack backtrace stack-frame

Clearing bits in a register in assembly

assembly x86

strlen in assembly

linux assembly x86 nasm strlen

Are two consequent CPU stores on x86 flushed to the cache keeping the order?

multithreading x86 cpu cpu-cache

Why bottom test loop is preferable?

gcc assembly compiler-construction x86 llvm

SSE Instructions: Byte+Short

x86 sse instructions

How to store the contents of a __m128d simd vector as doubles without accessing it as a union?

c x86 simd intrinsics sse2

Intel assembly syntax OFFSET

gcc assembly x86 nasm masm

Understanding sign and overflow flag in assembly

assembly x86

Why do interrupts need to be disabled before switching to protected mode from real mode?

operating-system x86 bootloader osdev real-mode

why for loop has 1 extra instruction than expected?

gcc optimization assembly x86 gcc4.9
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