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New posts in x86
How does perf use the offcore events?
Oct 17, 2025
linux-kernel
x86
perf
intel-pmu
creating a 32-bit binary file with nonzero org with TASM+TLINK
Oct 17, 2025
assembly
x86
tasm
x86 register names, addressing modes, displacement, and storage
Oct 17, 2025
assembly
x86
masm
addressing-mode
Keep getting e8 00 00 00 00 as the machine code to call a function in assembly
Oct 17, 2025
assembly
linker
x86
disassembly
machine-code
is boost::random::uniform_real_distribution supposed to be the same across processors?
Oct 17, 2025
c++
random
x86
boost
How does memory allocation happen at the lowest level in an operating system?
Oct 17, 2025
c
memory
memory-management
x86
operating-system
Tool to decode the page tables and descriptor tables from a RAM snapshot
Oct 17, 2025
linux-kernel
x86
reverse-engineering
intel
disassembly
How does CMPXCHG affect FLAGS register?
Oct 17, 2025
assembly
x86
intel
instruction-set
compare-and-swap
how do i get the cpu information for my computer i.e functional units/latency etc
Oct 17, 2025
assembly
x86
cpu-architecture
micro-architecture
Why can GCC only do loop interchange optimization when the int size is a compile-time constant?
Oct 16, 2025
c
gcc
optimization
x86
compiler-optimization
Return value from writing an unused parameter when falling off the end of a non-void function
Oct 16, 2025
c
gcc
x86
return-value
kernighan-and-ritchie
What registers does strcmp evaluate? x86 Assembly
Oct 16, 2025
assembly
x86
What is "=qm" in extended assembler
Oct 17, 2025
gcc
assembly
syntax
x86
inline-assembly
Memcpy takes the same time as memset
Oct 17, 2025
c
linux
memory
x86
malloc
How does DC PMM (memory mode) cache coherence behave?
Oct 17, 2025
x86
intel
cpu-architecture
cpu-cache
persistent-memory
What's ARM instruction equivalent to Intel's xchgl?
Oct 16, 2025
gcc
assembly
x86
arm
Do terms like direct/indirect addressing mode actual exists in the Intel x86 manuals
Oct 14, 2025
assembly
x86
addressing-mode
How is the bootstrap processor (BSP) selected on Intel ring and mesh architectures
Oct 15, 2025
x86
intel
cpu-architecture
boot
multicore
How much of this is needed to read ticks from the BIOS (8086)?
Oct 13, 2025
c
assembly
x86
x86-16
dos
uhex$ in masm assembly
Oct 14, 2025
assembly
x86
masm
masm32
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