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New posts in cpu-architecture
Why doesn't RFO after retirement break memory ordering?
Jul 15, 2022
assembly
x86-64
cpu-architecture
cpu-cache
rfo
Cortex M4 LDR/STR timing
Aug 23, 2022
performance
assembly
arm
cpu-architecture
cortex-m
How to find number of conflict misses in a cache simulator
Aug 23, 2022
caching
memory
cpu-architecture
computer-architecture
cpu-cache
Inclusive or exclusive ? L1, L2 cache in Intel Core IvyBridge processor
Sep 08, 2022
c
cpu-architecture
processor
cpu-cache
change instruction set in GCC
Aug 25, 2022
gcc
compiler-construction
x86
cpu-architecture
instruction-set
Why do 32-bit applications work on 64-bit x86 CPUs?
Nov 14, 2022
assembly
operating-system
x86-64
cpu-architecture
backwards-compatibility
Can atomic instructions straddle cache lines?
Mar 03, 2019
assembly
x86
intel
cpu-architecture
Is the assembly language different from one architecture to another?
Jun 16, 2022
assembly
operating-system
programming-languages
cpu-architecture
Understanding FMA instructions performance
Feb 19, 2018
floating-point
cpu-architecture
instruction-set
flops
fma
Is it allowed to access memory that spans the zero boundary in x86?
May 23, 2020
assembly
x86
x86-64
intel
cpu-architecture
How does the CPU know how many bytes it should read for the next instruction, considering instructions have different lenghts?
Sep 30, 2022
assembly
x86
cpu-architecture
disassembly
machine-code
What happens with nested branches and speculative execution?
Aug 31, 2022
cpu-architecture
nested-if
branch-prediction
speculative-execution
Can a lower level cache have higher associativity and still hold inclusion?
Sep 07, 2022
caching
memory
memory-management
cpu-architecture
cpu-cache
Why does x86 paging have no concept of privilege rings?
Sep 05, 2022
x86
operating-system
cpu-architecture
paging
privileges
What exactly is a machine cycle?
Oct 03, 2022
assembly
cpu-architecture
cpu-speed
z80
How does a process keep track of its local variables
Oct 10, 2022
c
assembly
memory-management
cpu-architecture
Interrupting an assembly instruction while it is operating
Oct 04, 2022
assembly
interrupt
cpu-architecture
atomic
interrupted-exception
Manual vectorization using AVX vector intrinsics only runs about the same speed as 4 scalar FP adds on Ryzen?
Mar 03, 2022
c
assembly
x86
cpu-architecture
avx
How do I find information about the parallel architecture of my CPU?
Nov 13, 2022
linux
parallel-processing
cpu-architecture
SoundCloud iOS SDK architectures
Sep 15, 2022
ios
xcode
linker-errors
soundcloud
cpu-architecture
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