I've recently found a code like this in a Verilog code that I'm referring to write finite state machine.
reg [15:0]Bus;
Bus = 'bzzzzzzzzzzzz1111;
What is the meaning of z here?
From the IEEE Std 1800-2012, section "6.3.1 Logic values":
z—represents a high-impedance state
The SystemVerilog value set consists of the following four basic values:
0—represents a logic zero or a false condition
1—represents a logic one or a true condition
x—represents an unknown logic value
z—represents a high-impedance state
The values 0 and 1 are logical complements of one another.
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