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New posts in x86

Interpreting eFlags in DDD

assembly x86 ddd-debugger

Loading an xmm from GP regs

assembly x86 sse simd micro-optimization

What on earth is an 'fword ptr'? [duplicate]

pointers assembly x86

x86-64: Cache load and eviction instruction

assembly x86 x86-64 cpu-cache

Why is my benchmark using __mm_prefetch slower?

c++ x86 cpu-architecture prefetch

How can Intel and AMD be different but still compatible?

optimization x86 intel cpu-architecture amd-processor

How to run 16 bit code on 32 bit Linux?

linux assembly x86 qemu 16-bit

Problem with BIOS INT 13H (Read Sectors From Drive)

assembly x86 virtualbox bootloader bios

Code alignment in one object file is affecting the performance of a function in another object file

c assembly x86 nasm avx

IR LLVM form vs assembly

c++ x86 clang llvm llvm-ir

Understanding the behavior of $ Location Counter - var1 DWORD $ assembles to start of data section in MASM, not start of line

assembly x86 masm memory-address

Why unlamination of μops necessary?

x86 cpu intel cpu-architecture

What is a fast fallback algorithm which emulates PDEP and PEXT in software?

c++ optimization x86 bit-manipulation bmi

INT vs CALL on Asm instructions

assembly x86 nasm

Cache friendly offline random read

algorithm performance optimization x86 cpu-cache

(NASM) (80x86) Bootloader NEEDS xor ax, ax

x86 nasm bootloader

Reading Current Uncore Frequency and Setting Uncore Frequency Multipliers

x86 intel cpu-architecture msr

Access of struct member faster if located <128 bytes from start?

assembly x86 micro-optimization

AT&T x86 | What does `xadd %eax, (%ecx)` do?

x86 att

LAHF (load AH with lower order byte of the flag register)

assembly x86 flags
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