Logo Questions Linux Laravel Mysql Ubuntu Git Menu
HTML CSS JAVASCRIPT SQL PYTHON PHP BOOTSTRAP JAVA JQUERY R React Kotlin
 

New posts in x86

What is the JCC instruction in x86

assembly x86 intel opcode mnemonics

Is Intel® Transactional Synchronization Extensions New Instruction (TSX-NI) difference from Intel TSX?

c++ assembly x86 intel-tsx

Can we say that an x86 CPU has data types?

assembly types x86

Why do Compilers put data inside .text(code) section of the PE and ELF files and how does the CPU distinguish between data and code?

x86 cpu reverse-engineering compiler-optimization elf

Can a UEFI machine use BIOS interrupts?

assembly x86 operating-system x86-16 uefi intel

gas: too many memory reference

assembly x86 gnu-assembler att

How do I use the LOCK ASM prefix to read a value?

assembly x86 thread-safety locking atomic

What address does the x86 begin executing at?

assembly x86

FS register in Win32

winapi x86 filesystems memory-segmentation seh

How is the modified return address in a stack based buffer overflow attack approximated?

c security x86 buffer-overflow exploit

bt assembly instruction

assembly x86 masm masm32

Printing a character to standard output in Assembly x86

assembly printing x86

How to load two sets of 4 shorts into an XMM register?

c++ x86 sse simd intrinsics

Why do I have PUSH ecx?

assembly x86

Accumulate vector of integer with sse

c++ vector x86 sse simd

Using ES register gives errors

assembly x86 nasm x86-16 cpu-registers

Under what conditions do I need to set up SEH unwind info for an x86-64 assembly function?

windows x86 nasm x86-64 seh

Fast way to get a close power-of-2 number (floating-point)

c++ x86 floating-point ieee-754

Who Decides Between I/O Mapped and Memory Mapped I/O (x86)

assembly x86 cpu-architecture

Why is my stack pointer only incrementing in multiples of 16?

assembly x86
« Newer Entries Older Entries »