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New posts in x86

BIOS Disk - Read Sectors Into Memory (int 0x13, ah=0x02) blocking

intel x86 qemu bootloader osdev mbr

access violation _mm_store_si128 SSE Intrinsics

intel c++ x86 simd sse intrinsics

AVX scalar operations are much faster

intel c memory x86 sse avx

assembly lea instruction of int *q = p++ and int c = a++

intel c assembly x86

Is the stack frame required for all functions in C on x86-64?

intel c assembly x86 stack x86-64

How to set the alignment for the .data section?

intel assembly visual-c++ x86 nasm

_umul128 on Windows 32 bits

intel visual-c++ x86 multiplication biginteger intrinsics

Polygot include file for nasm/yasm and C

intel c assembly x86 nasm yasm

Interpreting this line in Assembly language?

intel c gcc assembly x86 reverse-engineering

Why is memcpy slow in 32-bit mode with gcc -march=native on Ryzen, for large buffers?

intel c performance x86 memcpy amd-processor

AVX2 code slower then without AVX2

intel c++ performance x86 avx2

no emulation booting OS

intel x86 operating-system bootloader osdev dvd

How to map the section to the segment from an ELF output file?

intel gcc assembly x86 elf osdev

What is practical application of x86 RCL/RCR instructions?

intel assembly x86 bit-manipulation x86-64 bit-shift

What is a processor hint?

intel assembly x86 instructions

Can the simple decoders in recent Intel microarchitectures handle all 1-µop instructions?

intel x86 x86-64 cpu cpu-architecture

Does cmpxchg write destination cache line on failure? If not, is it better than xchg for spinlock?

intel assembly x86 cpu-cache micro-optimization compare-and-swap

How to achieve the effect of vpmovmskb on ZMM registers?

intel assembly x86 bitmask avx512

Placing an instruction in the address pointed by the reset vector using times and align NASM directives

intel assembly x86 nasm osdev

Access to PIT (?) IO ports 44h and 46h - what do those ports do?

intel assembly x86 dos x86-16 ioports
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