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New posts in avx

Using AVX instructions disables exp() optimization?

visual-c++ x86 exp avx

Assembly code/AVX instructions for multiplication of complex numbers. (GCC inline assembly)

c gcc assembly complex-numbers avx

What is the difference between MOVDQA and MOVNTDQA, and VMOVDQA and VMOVNTDQ for WB/WC marked region?

assembly x86 sse simd avx

AVX2 VPSHUFB emulation in AVX

x86 simd intrinsics avx

_mm_alignr_epi8 (PALIGNR) equivalent in AVX2

x86 simd intrinsics avx avx2

Setting __m256i to the value of two __m128i values

c sse simd avx

Loading 8 chars from memory into an __m256 variable as packed single precision floats

c++ sse simd avx avx2

Unknown type name __m256 - Intel intrinsics for AVX not recognized?

c++ c intel intrinsics avx

Shuffling by mask with Intel AVX

c++ sse simd intrinsics avx

How to probe the availability of Intel® Advanced Vector Extensions?

delphi delphi-2007 avx basm

Are there SIMD(SSE / AVX) instructions in the x86-compatible accelerators Intel Xeon Phi?

intel sse simd avx intel-mic

Is there an efficient way to get the first non-zero element in an SIMD register using SIMD intrinsics?

x86 bit-manipulation simd intrinsics avx

Using a variable to index a simd vector with _mm256_extract_epi32() intrinsic

simd intrinsics avx avx2

Saturated substraction - AVX or SSE4.2

c gcc optimization sse avx

Writing a portable SSE/AVX version of std::copysign

c++ x86-64 sse simd avx

Count leading zeros in __m256i word

c x86 simd intrinsics avx

Why do processors with only AVX out-perform AVX2 processors for many SIMD algorithms?

c# c++ simd avx avx2

Fast interleave 2 double arrays into an array of structs with 2 float and 1 int (loop invariant) member, with SIMD double->float conversion?

c++ x86 simd intrinsics avx

Using SIMD/AVX/SSE for tree traversal

performance assembly simd micro-optimization avx
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