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New posts in assembly

Indirect Y indexed addressing mode in MOS 6502

assembly 6502

How is exception handling implemented in Java?

java assembly exception compilation

RISCV branchless coding

assembly cpu-architecture riscv branchless conditional-move

Why gcc generates a PLT when it is apparently not needed?

linux assembly x86 elf dynamic-linking

Why "long long" arguments need to "aligned even-odd register pair" in RISC-V

assembly calling-convention riscv

Why cannot my program reach integer addition instruction throughput bound?

c assembly optimization cpu-architecture microbenchmark

Why does some Windows booloader code zero registers with `sub` instead of `xor`?

assembly x86 micro-optimization zero-initialization

Load two 64-bit integers into lower & upper xmm, respectively

assembly sse cpu-registers

Seemingly unnecessary loop

visual-c++ assembly x86

CPUID wrong values?

assembly x86 cpuid

Can 128bit/64bit hardware unsigned division be faster in some cases than 64bit/32bit division on x86-64 Intel/AMD CPUs?

performance assembly x86 x86-64 integer-division

C++ __asm Generating different bytes

c++ assembly mov

Tracing instruction execution from startup

assembly x86 x86-16 bootloader

Calling C++ function from assembly, with struct argument

c++ visual-studio-2010 visual-c++ assembly

Efficiently Set Lowest 64 Bits of YMM Register to Constant

optimization assembly sse vectorization avx

Why does the Windows x64 calling convention require XMM (FP) args copied to integer registers, for variadic functions like printf?

windows assembly floating-point x86-64 calling-convention

Understanding the x86 m* operands (FPU and otherwise)

assembly x86 disassembly 32-bit machine-code
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