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New posts in x86-64

x86-64: Cache load and eviction instruction

assembly x86 x86-64 cpu-cache

Why is it necessary to add a bias to the dividend for signed division by a power of 2?

assembly x86-64 bit-shift integer-division

Why parameters stored in registers and not on the stack in x86-64 Assembly?

assembly x86-64 function-parameter

Logical shift between YMM registers

assembly x86-64 avx avx2 avx512

Why does the following assembly sequence signals SIGILL?

assembly x86-64

Why does clang make the Quake fast inverse square root code 10x faster than with GCC? (with *(long*)float type punning)

c++ assembly gcc clang x86-64

In modern Linux x86-64 is it safe for userspace to overwrite the GS register?

linux assembly pthreads x86-64 memory-segmentation

Java volatile memory ordering and its compilation on x86-64

java x86-64 volatile memory-barriers java-memory-model

Strength reduction on floating point division by hand

c floating-point x86-64 ieee-754 strength-reduction

Benchmarking a bunch of continuous nop instructions

c performance assembly x86-64 no-op

What makes executables compiled with gcc on ARM64 larger than on x86_64?

linux gcc x86-64 executable arm64

In x86_64, does a 32-bit cmov clear the top bits if the condition is false?

assembly x86-64 cpu-registers conditional-move

Fastest way to set highest order bit of rax register to lowest order bit in rdx register

assembly optimization bit-manipulation x86-64 micro-optimization

Is resb 2 equivalent to resw 1?

assembly x86-64 nasm

First use of AVX 256-bit vectors slows down 128-bit vector and AVX scalar ops

assembly x86-64 sse simd avx

Questions about APIC interrupt

assembly operating-system x86-64 apic

Why Assembly x86_64 syscall parameters are not in alphabetical order like i386

assembly x86 x86-64 cpu-registers calling-convention

Speeding up a bit test operation by using assembly

c++ performance assembly x86-64 compiler-optimization
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