Reduce array to sum of elements

Question

I am trying to reduce a vector to a sum of all it elements. Is there an easy way to do this in verilog?

Similar to the systemverilog .sum method.

Thanks

Answer 1

My combinational solution for this problem:

//example array
parameter cells = 8;
reg [7:0]array[cells-1:0] = {1,2,3,4,5,1,1,1};

//###############################################

genvar i;
wire [7:0] summation_steps [cells-2 : 0];//container for all sumation steps
generate
    assign summation_steps[0] = array[0] + array[1];//for less cost starts witch first sum (not array[0])
    for(i=0; i<cells-2; i=i+1) begin
        assign summation_steps[i+1] = summation_steps[i] + array[i+2];
    end
endgenerate
wire [7:0] result;
assign result = summation_steps[cells-2];