In JWASM/MASM - pshufw produces Error A2030: Instruction or register not accepted in current CPU mode

Question

I have the following assembly program that gives me an error when compilating:

.686
.mmx
.model flat,c
.code

MmxAdd  proc
    push ebp
    mov ebp,esp

    mov eax, [ebp+24]        
    cmp eax, AddOpTableCount      
    jae BadAddOp                

    movq mm0,[ebp+8]             
    movq mm1,[ebp+16]       
    jmp [AddOpTable+eax*4]       

MmxPaddb:
    paddb mm0,mm1            
    jmp SaveResult

MmxPaddsb:
    paddsb mm0,mm1               
    jmp SaveResult  

MmxPaddusb:
    paddusb mm0,mm1             
    jmp SaveResult

MmxPaddw:
    paddw mm0,mm1             
    jmp SaveResult

MmxPaddsw:
    paddsw mm0,mm1             
    jmp SaveResult  

MmxPaddusw:
    paddusw mm0,mm1           
    jmp SaveResult

MmxPaddd:                       
    paddd mm0,mm1
    jmp SaveResult

BadAddOp:
    pxor mm0,mm0

SaveResult:
    movd eax,mm0                   
    pshufw mm2,mm0, 01001110b       
    movd edx,mm2                   
    emms                           

    pop ebp
    ret

    align 4                                            

AddOpTable:
    dword MmxPaddb, MmxPaddsb, MmxPaddusb
    dword MmxPaddw, MmxPaddsw, MmxPaddusw
    dword MmxPaddd

AddOpTableCount equ ($-AddOpTable) / size dword

MmxAdd  endp
    end

But every time I try to compile it with JWASM I get the following error:

Mmx_Addition.asm(51) : Error A2030: Instruction or register not accepted in current CPU mode

That is the instruction that give me the error:

pshufw mm2,mm0, 01001110b

How can I solve this?

Answer 1

pshufw is considered an SSE(SSE-1) instruction. The instruction was considered an an extension to MMX aka MMXEXT, and to use it you will have to enable SSE using the .xmm directive instead of .mmx. This should work:

.686
.xmm
.model flat,c
.code

.xmm also implies .mmx so you don't need both. If you do use both then .mmx has to come before .xmm. I don't recommend using both.

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The other instructions added as MMX extensions with SSE-1 were:

• PINSRW

  Insert 16-bit value from general register into one of four elements (specified by immediate)

• PEXTRW

  Extract one of four elements (specified by immediate) to a general register

• PMULHU

  Multiply four 16-bit unsigned elements returning most significant 16 bits of each

• PSHUFW

  Full shuffle of 16-bit elements under control of 8-bit immediate mask

• PMOVMSB

  Move 8-bit mask composed of MSbs of byte elements to a general register

• PAVGB

  Average of byte elements (Di = –(Di+ Si + 1)/2, i = 0…7)

• PAVGW

  Average of 16-bit elements (Di = –(Di + Si + 1)/2, i = 0…3)

• PSADBW

  Sum of absolute value of differences of 16-bit elements (D1,0 = ∑i=0…3 |Di – Si|)

• PMINSW

  Minimum of signed 16-bit elements

• PMINUB

  Minimum of unsigned byte elements

• PMAXSW

  Maximum of signed 16-bit elements

• PMAXUB

  Maximum of unsigned byte elements

---

You must use .686 (or later) alongside .xmm for .xmm directive to work as expected.