MIPS ISA has an R
type instruction, and the R
instruction has an opcode
field at its first 6 bits and a funct
field at its last 6 bits. So why are the ISA designed like this? How about combine them into a 12-bits field?
My idea is that the three kinds of instructions share a prefix of 6-bit opcode. And for R and I types, the next 5 bits decide source register. If we combine opcode and funct for R instruction, the instruction format is not so consistent between R and I, which may make processor's design complex.
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