Questions
Linux
Laravel
Mysql
Ubuntu
Git
Menu
HTML
CSS
JAVASCRIPT
SQL
PYTHON
PHP
BOOTSTRAP
JAVA
JQUERY
R
React
Kotlin
×
Linux
Laravel
Mysql
Ubuntu
Git
New posts in avx
How to get data out of AVX registers?
Mar 08, 2018
c++
visual-c++
avx
fma
How to clear the upper 128 bits of __m256 value?
May 07, 2022
c
x86
simd
avx
avx2
Generate code for multiple SIMD architectures
Apr 04, 2022
gcc
simd
avx
sse4
Find index of maximum element in x86 SIMD vector
Sep 17, 2022
c++
x86
sse
simd
avx
intel
practical BigNum AVX/SSE possible?
Jun 06, 2020
sse
biginteger
simd
avx
extended-precision
Why doesn't gcc resolve _mm256_loadu_pd as single vmovupd?
Apr 05, 2022
gcc
assembly
vectorization
simd
avx
ASM x86_64 AVX: xmm and ymm registers differences
Sep 22, 2022
assembly
nasm
x86-64
avx
Get index of first element that is not zero in a __m256 variable
Nov 09, 2022
c++
c
sse
simd
avx
What's the point of the VPERMILPS instruction (_mm_permute_ps)?
Sep 17, 2021
assembly
x86
avx
instruction-set
Fast vectorized rsqrt and reciprocal with SSE/AVX depending on precision
Oct 24, 2021
performance
sse
simd
avx
Using __m256d registers
Oct 18, 2022
c++
x86
intel
simd
avx
GCC emits vastly different code using "-march=native" on similar architectures
Sep 10, 2022
c
gcc
assembly
sse
avx
How to quickly count bits into separate bins in a series of ints on Sandy Bridge? [duplicate]
Oct 31, 2022
c++
assembly
x86
simd
avx
Scatter intrinsics in AVX
Feb 20, 2022
intrinsics
avx
avx2
Vectorizing with unaligned buffers: using VMASKMOVPS: generating a mask from a misalignment count? Or not using that insn at all
Feb 17, 2022
gcc
assembly
x86
sse
avx
RyuJIT not making full use of SIMD intrinsics
Nov 01, 2022
c#
sse
simd
avx
ryujit
Unaligned load versus unaligned store
Dec 01, 2020
c++
performance
x86
memory-alignment
avx
When the compiler reorders AVX instructions on Sandy, does it affect performance?
Mar 05, 2022
c
performance
optimization
intrinsics
avx
Is it worth bothering to align AVX-256 memory stores?
Mar 16, 2022
performance
assembly
x86-64
memory-alignment
avx
intel
Why do SSE instructions preserve the upper 128-bit of the YMM registers?
Sep 17, 2022
performance
x86
avx
« Newer Entries
Older Entries »