Instruction execution latencies for A53

Question

I'm working on optimizing a function which uses floating point instructions.

For bench marking I need to know execution latency of the instructions to know theoretical possible performance.

I have found such manual for A57: http://infocenter.arm.com/help/topic/com.arm.doc.uan0015b/Cortex_A57_Software_Optimization_Guide_external.pdf

But, I don't find any such doc for A53. Am I missing something? Is there any such optimization guide available for A53?

Answer 1

Some saint independently measured the instruction latencies.

http://hardwarebug.org/2014/05/15/cortex-a7-instruction-cycle-timings/

Note that the a53 evolved from the a7 and hence the timings are likely similar. It is a completely different design from the a57, which has a much longer pipeline and out of order execution.