Taking Peter Norvig's advice, I am pondering on the question:
How much time does it take to fetch one word from memory, with and without a cache miss?
(Assume standard hardware and architecture. To simplify calculations assume 1Ghz clock)
DRAM (dynamic random access memory) chips for personal computers have access times of 50 to 150 nanoseconds (billionths of a second). Static RAM (SRAM) has access times as low as 10 nanoseconds. Ideally, the access time of memory should be fast enough to keep up with the CPU.
Cache memory is the fastest system memory, required to keep up with the CPU as it fetches and executes instructions. The data most frequently used by the CPU is stored in cache memory.
Memory cycle time = access time plus transient time (any additional time required before a second access can commence). — Time may be required for the memory to “recover” before next access — Cycle time is access + recovery • Transfer Rate: This is the rate at which data can be transferred in and out of a memory unit.
Seems like Norvig answers this himself:
execute typical instruction 1/1,000,000,000 sec = 1 nanosec
fetch from L1 cache memory 0.5 nanosec
branch misprediction 5 nanosec
fetch from L2 cache memory 7 nanosec
Mutex lock/unlock 25 nanosec
fetch from main memory 100 nanosec
send 2K bytes over 1Gbps network 20,000 nanosec
read 1MB sequentially from memory 250,000 nanosec
fetch from new disk location (seek) 8,000,000 nanosec
read 1MB sequentially from disk 20,000,000 nanosec
send packet US to Europe and back 150 milliseconds = 150,000,000 nanosec
The part where it says "execute typical instruction" = 1 ns implies a 1 GHz CPU (assuming efficient pipelining, of course).
I don't know where he takes this information, but I trust Peter Norvig to be reliable :-)
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