Can you assign a wildcard to a variable using NMAKE? [duplicate]

Question

I come from a UNIX background so I'm used to being able to do things like this in GNU/Make:

SRC=$(wildcard src/*.c)
OBJ=$(SRC:.c=.o)

all: $(OBJ)
    ...

I'm wondering if something roughly equivalent to be accomplished in Microsoft NMAKE. I've got the following simple NMAKE Makefile:

all: obj\a.obj obj\b.obj obj\c.obj 

{src\}.c{obj\}.obj:
    cl /c $** /Fo$@

This works fine. It takes all the source files from src/, and compiles them to their equivalents in obj/. However, I'd like to condense the default target down to a wildcard like obj/*.obj so that I don't have to write out all the object files manually.

Is this possible in NMAKE? I've checked through the NMAKE documentation pretty thoroughly and it doesn't seem to describe anything like what I want to do.

UPDATE:

I managed to get the effect I wanted using the accepted solution to this question as reference, and using the following Makefile:

.SUFFIXES: .c .obj

obj_files=$(**:.c=.obj)
all: src\*.c
    @$(MAKE) $(obj_files:src=obj)

{src\}.c{obj\}.obj:
    cl /c $< /Fo$@

This works using the obj\ subfolder as the output directory. The $** macro is expended within the all target.

Answer 1

I managed to wildcard all .c files in the src\ subfolder, and compile them to .obj output in the obj\ subfolder using the following Makefile:

.SUFFIXES: .c .obj

obj_files=$(**:.c=.obj)
all: src\*.c
    @$(MAKE) $(obj_files:src=obj)

{src\}.c{obj\}.obj:
    cl /c $< /Fo$@

obj_files has to be defined with the $** macro (which will expand in the all target) because I needed to do a double string substitution in order to change the directory name and the file suffix. So far, all the resources I've found only specify how to do a single string substitution.